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MC44604 High Safety Pulsed Mode Standby GreenLinet PWM Controller
The MC44604 is an enhanced high performance controller that is specifically designed for off-line and dc-to-dc converter applications. Its high current totem pole output is ideally suited for driving a power MOSFET. The MC44604 is an evolution of the MC44603A. Like the MC44603A, the MC44604 has been optimized to operate with universal ac mains voltage from 80 V to 280 V. It also offers enhanced safety and reliable power management thanks to its protection features (foldback, overvoltage detection, soft-start, accurate demagnetization detection). In addition, the MC44604 offers a new efficient way to reduce the standby operating power by means of a so-called pulsed mode standby operation of the converter, significantly reducing the converter consumption in standby mode.
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16 1 PDIP-16 P SUFFIX CASE 648
MARKING DIAGRAM
16 MC44604P AWLYYWWG 1
* * * * * * * * * * * * * * *
Operation Up to 250 kHz Output Switching Frequency Inherent Feed Forward Compensation Latching PWM for Cycle-by-Cycle Current Limiting Oscillator with Precise Frequency Control Externally Programmable Reference Current Secondary or Primary Sensing High Current Totem Pole Output Undervoltage Lockout with Hysteresis Overvoltage Protection Facility Against Open Loop Protection Against Short Circuit on Oscillator Pin Fully Programmable Foldback Soft-Start Feature Accurate Maximum Duty Cycle Setting Demagnetization (Zero Current Detection) Protection Internally Trimmed Reference
High Flexibility
A WL YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
Safety/Protection Features
PIN CONNECTIONS
VCC VC Output GND Foldback Input Overvoltage Protection Current Sense Input Demagnetization Detection Input
1 2 3 4 5 6 7 8 (Top View)
16 Rref 15 Standby Management 14 Error Amp Input 13 Error Amp Output 12 Clamp Error Amp Input
max 11 Voltage Mode 10 CT
Soft-Start/D
/
GreenLinet Controllert
* Low Startup and Operating Current * Pulsed Mode Standby for Low Standby Losses * Low dV/dT for Low EMI
Features
9 Standby
Current Set
ORDERING INFORMATION
Device MC44604P Package PDIP-16 PDIP-16 (Pb-Free) Shipping 25 Units / Rail 25 Units / Rail
* Pb-Free Package is Available*
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2005
MC44604PG
1
October, 2005 - Rev. 5
Publication Order Number: MC44604/D
MC44604
Block Diagram
Rref 16 V ref Demagnetization Detection 8 Demagnetization Management V stby i ref 4.7 V Oscillator C T 10 Dis(stby-latched) Standby 15 Management Standby Management V stby I ref V ref V CC 6 Overvoltage Protection (OVP) V ref V OSC Vosc prot Dis(stby) Set Q PWM Latch Reset Thermal Shutdown Buffer 3 OUTPUT V demag out Reference Block I ref V CC enable Supply Initialization Block UVLO1 UVLO2 V stby 18 V
V cc 1
Clamp Error Ampllifier Input 12
2
VC
4
GND
Dis(stby) V ref Voltage Feedback Input 14 + - Error AMP V cs Current Sense Dmax & Soft-Start Control V stby V stby 5 Foldback Input 8 Standby Current Set 7 Current Sense Input 11 Soft-Start (Css)/Dmax Voltage Mode Control i ref
Overvoltage Management UVLO2 V CC enable UVLO1 V CC enable Dis(stby-latched) MC44604
E/A Output 13 Standby (lpk)max Programmation
Foldback
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MC44604
MAXIMUM RATINGS
Rating Total Power Supply and Zener Current Output Supply Voltage with Respect to Ground Output Current (Note 1) - Source - Sink Output Energy (Capacitive Load per Cycle) Soft-Start Clamp Error Amp Input Foldback Input, Stand-by Management Overvoltage Protection, Current Sense Input, Rref, Error Amp Input, Error Amp Output, CT, Stand-by Current Set Demagnetization Detection Input Current - Source - Sink Error Amplifier Output Sink Current Power Dissipation and Thermal Characteristics Maximum Power Dissipation at TA = 85C Thermal Resistance, Junction-to-Air Operating Junction Temperature Operating Ambient Temperature 8 Idemag-ib (Source) Idemag-ib (Sink) 13 IE/A (Sink) PD RqJA TJ TA -4.0 10 20 0.6 100 150 -25 to +85 mA W C/W C C Vin 11 12 2 1 3 IO(Source) IO(Sink) W VSS VCLEA -750 750 5.0 -0.3 to 2.2 -0.3 to 4.5 -0.3 to VCC + 0.3 -0.3 to 5.5 mJ V V V V mA Pin # Symbol (ICC + IZ) VC VCC Value 30 18 Unit mA V mA
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Maximum package power dissipation must be observed.
ELECTRICAL CHARACTERISTICS (VCC and VC = 12 V [Note 2], Rref = 10 kW, CT = 820 pF, for typical values TA = 25C, for min/max values TA = -25 to +85C [Note 3], unless otherwise noted.)
Characteristic OUTPUT SECTION (Note 4) Output Voltage (Note 5) Low Level Drop Voltage (ISink = 100 mA) (ISink = 500 mA) High Level Drop Voltage (ISource = 200 mA) (ISource = 500 mA) Output Voltage During Initialization Phase VCC = 0 to 1.0 V, ISink = 10 mA VCC = 1.0 to 5.0 V, ISink = 100 mA VCC = 5.0 to 13 V, ISink = 1.0 mA Output Voltage Rising Edge Slew-Rate (CL = 1.0 nF, TJ = 25C) Output Voltage Falling Edge Slew-Rate (CL = 1.0 nF, TJ = 25C) ERROR AMPLIFIER SECTION Voltage Feedback Input (VE/A out = 2.5 V) Input Bias Current (VFB = 2.5 V) Open Loop Voltage Gain (VE/A out = 2.0 V to 4.0 V) Unity Gain Bandwidth TJ = 25C TA = -25 to +85C Voltage Feedback Input Line Regulation (VCC = 10 V to 15 V) 2. 3. 4. 5. 14 14 14 VFB IFB-ib AVOL BW - - VFBline-reg -10 - - - - 5.5 10 mV 2.4 -2.0 65 2.5 -0.6 70 2.6 - - V mA dB MHz 3 VOL VOH 3 VOL - - - 3 3 dVo/dT dVo/dT - - - 0.1 0.1 300 -300 1.0 1.0 1.0 - - V/ms V/ms - - - - 1.0 1.4 1.5 2.0 1.2 2.0 2.0 2.7 V V Pin # Symbol Min Typ Max Unit
Adjust VCC above the startup threshold before setting to 12 V. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. No output signal when the Error Amplifier is in Low State, i.e., VFB = 2.7 V. VC must be greater than 5.0 V.
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MC44604
ELECTRICAL CHARACTERISTICS (VCC and VC = 12 V [Note 6], Rref = 10 kW, CT = 820 pF, for typical values TA = 25C,
for min/max values TA = -25 to +85C [Note 7], unless otherwise noted.) Characteristic ERROR AMPLIFIER SECTION (continued) Output Current Sink (VE/A out = 1.5 V, VFB = 2.7 V) TA = -25 to +85C Source (VE/A out = 5.0 V, VFB = 2.3 V) TA = -25 to +85C Output Voltage Swing High State (IE/A out (source) = 0.5 mA, VFB = 2.3 V) Low State (IE/A out (sink) = 0.33 mA, VFB = 2.7 V) REFERENCE SECTION Reference Output Voltage (VCC = 10 V to 15 V) Reference Current Range (Iref = Vref/Rref, R = 5.0 k to 25 kW) Reference Voltage Over Iref Range OSCILLATOR SECTION Frequency TA = 0 to +70C TA = -25 to +85C Frequency Change with Voltage (VCC = 10 V to 15 V) Frequency Change with Temperature (TA = -25 to +85C) Oscillator Voltage Swing (Peak-to-Peak) Ratio Charge Current/Reference Current (TA = -25 to +85C) Fixed Maximum Duty Cycle = Idischarge/(Idischarge + Icharge) UNDERVOLTAGE LOCKOUT SECTION Startup Threshold Disable Voltage After Threshold Turn-On TA = 0 to +70C TA = -25 to +85C Disable Voltage After Threshold Turn-On Delta VCC During Standby (Vstup-th -Vdisable2) (TA = -25C to 85C) DEMAGNETIZATION DETECTION SECTION Demagnetization Detect Input Demagnetization Comparator Threshold (Vpin8 Decreasing) Propagation Delay (Input to Output, Low to High) Input Bias Current (Vdemag = 65 mV) Negative Clamp Level (Idemag = -2.0 mA) Positive Clamp Level (Idemag = +2.0 mA) SOFT-START SECTION Ratio Charge Current/Iref TA = 0 to +70C TA = -25 to +85C Discharge Current (Vsoft-start = 1.0 V) Clamp Level Duty Cycle (Rsoft-start = 12 kW) Duty Cycle (Vsoft-start (pin11) = 0.1 V) 11 Iss(ch)/Iref 0.37 0.36 Idischarge Vss(CL) Dsoft-start 12k Dsoft-start 1.5 2.2 36 - 0.4 - 5.0 2.4 42 - 0.43 0.44 - 2.6 49 0 mA V % - 8 Vdemag-th - Idemag-lb CL(neg) CL(pos) 50 - -0.5 - - 65 0.25 - -0.38 0.72 80 - - - - mV ms mA V V 1 1 Vstup-th Vdisable1 8.6 8.3 1 1 Vdisable2 Vstup-th -Vdisable2 7.0 1.8 9.0 - 7.5 2.0 9.4 9.6 8.0 2.2 V V 13.6 14.5 15.4 V V 10 FOSC 40.5 40 DFOSC/DV DFOSC/DT VOSC(P-P) Icharge/Iref D - - - 0.35 78 46 - 0.05 0.05 2.0 - 80 48.5 49 - - - 0.43 82 %/V %/C V - % kHz 16 16 Vref Iref DVref 2.4 -500 -40 2.5 - - 2.6 -100 40 V mA mV 13 ISink 2.0 ISource -2.0 13 VOH VOL 5.5 - 6.5 1.0 7.5 1.1 - -0.2 V 12 - mA Pin # Symbol Min Typ Max Unit
6. Adjust VCC above the startup threshold before setting to 12 V. 7. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
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MC44604
ELECTRICAL CHARACTERISTICS (VCC and VC = 12 V [Note 8], Rref = 10 kW, CT = 820 pF, for typical values TA = 25C,
for min/max values TA = -25 to +85C [Note 9], unless otherwise noted.) Characteristic CURRENT SENSE SECTION Maximum Current Sense Input Threshold (VFeedback (pin14) = 2.3 V and Vfoldback (pin6) = 1.2 V) Input Bias Current Propagation Delay (Note 10) OVERVOLTAGE SECTION Protection Threshold Level on VOVP Propagation Delay (VOVP > 2.58 V to Vout Low) Protection Level on VCC TA = 0 to +70C TA = -25 to +85C Input Resistance TA = 0 to +70C TA = -25 to +85C FOLDBACK SECTION (Note 11) Current Sense Voltage Threshold (Vfoldback (pin5) = 0.9 V) Foldback Input Bias Current (Vfoldback (pin5) = 0 V) CLAMP ERROR AMPLIFIER INPUT Clamp Level (@ l = 30 mA) STANDBY PULSED MODE SECTION Standby Initialization Current Ratio (S1 closed) Minimum Initialization Current Pulse Width (Note 12) Standby On Detection Current Ratio Standby Regulation Current Ratio Standby Bias Current (S1 and S2 open; 0 V t Vpin15 t Vstup-th) (Note 13) STANDBY CURRENT SET Peak Standby Current Setting Ratio TA = 0 to +70C TA = -25 to +85C Standby Current Sense Threshold Ratio (Note 14) TOTAL DEVICE Power Supply Current Startup (Note 13) Operating TA = -25 to +85C (Note 9) Power Supply Zener Voltage (ICC = 25 mA) Thermal Shutdown ICC - 16 VZ - 18.5 - 0.3 20 - 155 0.45 24 - - V C mA 9 Ipk-stby/Iref - 7 Vpin9/Vcs-st 0.37 0.36 2.4 0.4 0.4 2.6 0.43 0.44 2.9 - - 15 15 15 15 Iinit/Iref Tinit Idet/Iref Ireg/Iref Istby-ib 126 - 0.34 18 -1.0 140 - 0.38 20.5 - 154 1.0 0.42 23 2.0 - ms - - mA 12 Vcl 4.5 4.7 4.9 V 5 5 Vcs-th Ifoldback-lb 0.84 -6.0 0.88 -2.0 0.89 - V mA VCC prot 16.1 15.9 - 1.5 1.4 2.0 - 3.0 3.4 17 - 17.9 18.1 kW 6 VOVP-th 2.42 1.0 2.5 - 2.58 3.0 V ms V in Normal Mode in Standby Mode 7 7 Vcs-th Ics-ib tCS-NM tCS-stby 0.93 -10 - - 0.96 -2.0 120 120 1.00 - 200 200 V mA ns Pin # Symbol Min Typ Max Unit
8. Adjust VCC above the startup threshold before setting to 12 V. 9. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 10. Current Sense Input to Output at VTH of MOS transistor = 3.0 V. 11. This function can be inhibited by connecting pin 5 to VCC. 12. This is the minimum time during which the pin 15 current must be higher than Iinit to enable the detection of the transition normal to standby mode. 13. Tested using VCC = 6.0 V, 9.0 V, 13.5 V, the MC44604 being off. 14. Tested using Vpin9 = 0.2 V, 0.4 V, 0.6 V, 0.8 V, 1.0 V.
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MC44604
120 PROPAGATION DELAY (m s ) -25 0 25 50 75 100 115 PROPAGATION DELAY (m s ) 110 105 100 95 90 85 80 -50 120 115 110 105 100 95 90 85 80 -50 -25 0 25 50 75 100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 1. Propagation Delay Current Sense Input vs. Temperature
3.2 A VCS, CURRENT SENSE GAIN PROPAGATION DELAY (m s ) 3.0
Figure 2. Propagation Delay Current Sense Input in Standby vs. Temperature
3.1
2.5
3.0
2.0
2.9
1.5
2.8 -50
-25
0
25
50
75
100
1.0 -50
-25
0
25
50
75
100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 3. Current Sense Gain vs. Temperature
Figure 4. Propagation Delay Current (Vovp > 2.58 V to Vout Low) vs. Temperature
80 75 70 65 60 55 50 -50
2.20 Vstup-th -Vdisable2 , DELTA VCCDURING STAND-BY (V) 2.15 2.10 2.05 2.00 1.95 1.90 1.85 1.80 -50 -25 0 25 50 75
V , DEMAG COMPARATOR demag-th THRESHOLD (mV)
100
-25
0
25
50
75
100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 5. Delta VCC During Standby
Figure 6. Demag Comparator Threshold vs. Temperature
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MC44604
70 60
V cs-th,CURRENT SENSE THRESHOLD (V), Vph 9 = Q9V
160
0.890 0.885 0.880 0.875 0.870 0.865 0.860 0.855 0.850 0.845 Vpin5 = 0.9 V
50 40 GAIN (dB) 30 - 60 20 10 0 -10 -20 1 10 100 F, FREQUENCY (kHz) 1000 -40 10000
0.840 -50
-25 0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
Figure 7. Error Amplifier Gain and Phase vs. Frequency
F OSC ,OSCILLATOR FREQUENCY (Hz) I /I det ref (Standby On Detection Current Ratio) 49000 48000 47000 46000 45000 44000 43000 42000 41000 40000 -50 -25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 0.42 0.41 0.40 0.39 0.38 0.37 0.36 0.35 0.34 -50
Figure 8. Current Sense Voltage Threshold vs. Temperature
100
-25 0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
Figure 9. Oscillator Frequency vs. Temperature
Figure 10. Standby On Detection Current Ratio vs. Temperature
2.9
V ph 9/ V cs-st,STANDBY CURRENT SENSE THRESHOLD RATIO
I /I init ref (Standby Initialization Current Ratio)
156 151 146 141 136 131 126 -50
2.8
2.7
2.6 2.5
2.4 -25 0 25 50 75 100 0 0.5 1 1.5 2 2.5 TA, AMBIENT TEMPERATURE (C) Vpin9, STANDBY CURRENT SET (V)
Figure 11. Standby Initialization Current Ratio vs. Temperature
Figure 12. Standby Current Sense Threshold Ratio
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MC44604
0.44 Ireg /I ref , STANDBY REGULATION CURRENT RATIO -25 0 25 50 75 100 IPK-STBY /I ref , PEAK STANBY CURRENT SETTING RATIO 0.43 0.42 0.41 0.40 0.39 0.38 0.37 0.36 -50 23.0 22.5 22.0 21.5 21.0 20.5 20.0 19.5 19.0 18.5 18.0 -50 -25 0 25 50 75 100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 13. Peak Standby Current Setting Ratio vs. Temperature
1.2 Vol , SINK OUTPUT SATURATION VOLTAGE (V) 1.0 0.8 0.6 0.4 0.2 0 V OH , SOURCE OUTPUT SATURATION VOLTAGE (V) 0 100 200 300 400 500 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0
Figure 14. Standby Regulation Current Ratio vs. Temperature
100
200
300
400
500
Isink, SINK OUTPUT CURRENT (mA)
Isource, OUTPUT SOURCE CURRENT (mA)
Figure 15. Sink Output Saturation Voltage vs. Sink Current
0.45 I CC , SUPPLY CURRENT (mA) 0 2 6 8 10 VCC, SUPPLY VOLTAGE (V) 4 12 14 START UP CURRENT (mA) 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 24 20 16 12 8 4 0
Figure 16. Source Output Saturation Voltage vs. Source Current
0
2
4 6 8 10 12 VCC, SUPPLY VOLTAGE (V)
14
16
Figure 17. Startup Current vs. VCC
Figure 18. Supply Current vs. Supply Voltage
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MC44604
15.5 14.5 13.5 VOLTAGE (V) 12.5 11.5 10.5 9.5 8.5 7.5 6.5 -50 -25 0 Vdisable2, UVLO2 Vdisable1, UVLO1 Vstup, STARTUP THRESHOLD VOLTAGE V CC, OVERVOLTAGE THRESHOLD (Vcc_prot ) 100 18.0
17.5
17.0
16.5
25
50
75
16.0 -50
-25
0
25
50
75
100
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 19. Startup Threshold, UVLO1, UVLO2 Voltage vs. Temperature
4.90 4.85 V , PIN 12 CLAMP LEVEL cl 4.80 4.75 4.70 4.65 4.60 4.55 4.50 -50 -25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 2.60 V ref , REFERENCE VOLTAGE (V)
Figure 20. Protection Level on VCC vs. Temperature
2.55
2.50
2.45
2.40 -50
-25 0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
Figure 21. Clamp Error Amplifier Input vs. Temperature
22.0 Y 2 , ZENER VOLTAGE (V) 21.5 21.0 20.5 20.0 19.5 18.0 -50
Figure 22. Reference Voltage vs. Temperature
-25 0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
Figure 23. Power Supply Zener Voltage vs. Temperature
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MC44604
Pin 1 2 VCC VC Name Pin Description This pin is the positive supply of the IC. The output high state, VOH, is set by the voltage applied to this pin. With a separate connection to the power source, it gives the possibility to set by means of an external resistor the output source current at a different value than the sink current. The output current capability is suited for driving a power MOSFET. A Bipolar transistor can also be driven for low power applications. The maximum on-time of the duty cycle can last up to 80% of the switching period. The ground pin is a single return typically connected back to the power source, it is used as control and power ground. The foldback function ensures an overload protection. Feeding the foldback input with a portion of the VCC voltage (1.0 V max) establishes on the system control loop a foldback characteristic allowing a smoother startup and a sharper overload protection. The foldback action performs an active current sense clamping reduction. Above 1.0 V the foldback input is no more active. When the overvoltage protection pin receives a voltage greater than 17 V the device gets disabled and requires a complete restart sequence. The overvoltage level is programmable. A voltage proportional to the current flowing into the power switch is connected to this input. The PWM latch uses this information to terminate the conduction of the output buffer when operating in current mode. A maximum level of 1.0 V allows to limit the inductor current either in current or voltage mode of operation. A voltage delivered by an auxiliary transformer winding provides to the demagnetization pin an indication of the magnetization state of the flyback energy reservoir. A zero voltage detection corresponds to a complete core demagnetization. The demagnetization detection ensures a discontinuous mode of operation. This function can be inhibited by connecting Pin 8 to GND. Using an external resistor connected to this pin, the standby burst mode peak current can be adjusted. The normal mode oscillator frequency is programmed by the capacitor CT choice together with the Rref resistance value. CT, connected between pin 10 and GND, generates the oscillator sawtooth. A capacitor or a resistor or a voltage source connected to this pin can temporary or permanently control the effective switching duty-cycle. This pin can be used as a voltage mode control input. By connecting pin 11 to Ground, the MC44604 can be shut down. In normal mode, the current drawn from this pin, is used by the Error Amplifier to perform the regulation. A 4.7 V zener diode clamps the voltage of this pin. The error amplifier output is made available for loop compensation. This is the inverting input of the Error Amplifier. It uses a voltage that is built up using the current drawn from the pin 12. This block is designed to detect the standby mode. It particularly determines if the circuit must work in standby or in normal mode at each startup. For that, it uses an information given by an external arrangement consisting of an opto-coupler. In standby mode, this block makes the circuit work in the standby configuration, and the current injected in the pin 15 is used to perform the regulation. In normal mode, this pin is internally connected to the pin 12. The RREF values fixes the internal reference current which is used to perform the precise oscillator waveform. The current range goes from 100 mA up to 500 mA.
3
Output
4 5
GND Foldback Input
6
Overvoltage Protection
7
Current Sense Input
8
Demagnetization Detection
9 10
Standby Current Set CT
11
Soft-Start/Dmax/Voltage-Mode
12 13 14 15
Clamp Error Amplifier Input E/A Out Voltage Feedback Standby Management
16
RREF
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MC44604
Operating Description Schematics
V CC V stup-th V disable1 V disable2
V ref
UVLO1
V Pin 11 (Soft-Start)
I CC 17 mA 0.3 mA
Figure 24. Switching Off Behavior
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III III
Output (Pin 3)
MC44604
Operating Description Schematics
V CC prot V stup-th V disable1 V disable2 Normal Mode
V CC
No-Take Over Startup Restart
Loop Failure >2.0 ms
V ref
UVLO1
V Pin 11 (Soft-Start)
V OVP Out
Output
I CC 17 mA 0.3 mA
Figure 25. Starting Behavior and Overvoltage
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III III III
IIIIIIII II IIIIIIII II IIIIIIII II
MC44604
Operating Description Schematics
Vref
VCSS + 1.6 V VCT 3.6 V VCT low 1.6 V
Soft-Start
Internal Clamp
External Clamp
VOSC
Output (Pin 3)
Figure 26. Soft-Start and Dmax
V demag in
Output (Pin 3)
Vdemag out
V demag in
Demagnetization Management
V demag out Oscillator
Buffer
Output
Figure 27. Demagnetization
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MC44604
Error Amplifier A fully compensated Error Amplifier with access to the inverting input and output is provided. It features a typical DC voltage gain of 70 dB. The non-inverting input is internally biased at 2.5 V and is not pinned out. The converter output voltage is typically divided down and monitored by the inverting input. The maximum input bias current with the inverting input at 2.5 V is -2.0 mA. This can cause an output voltage error that is equal to the product of the input bias current and the equivalent input divider source resistance. The Error Amp Output (Pin 13) is provided for external loop compensation. The output voltage is offset by two diodes drops ([ 1.4 V) and divided by three before it connects to the inverting input of the Current Sense Comparator. This guarantees that no drive pulses appear at the Source Output (Pin 3) when Pin 13 is at its lowest state (VOL). This occurs when the power supply is operating and the load is removed, or at the beginning of a soft-start interval. The Error Amp minimum feedback resistance is limited by the amplifier's minimum source current (0.2 mA) and the required output voltage (VOH) to reach the current sense comparator's 1.0 V clamp level:
R [ f (min) 3 * 0(1 * 0 V) ) 1* 4 V + 22 k 0 * 2 mA
+ Compensation RFB C1 Rf 13 14 2.5 V Voltage Feedback Input R1 Foldback 5 Input + 4.7 W Pin 12 R2 MC44604 GND 4 Error Amplifier 2R R Current Sense Comparator 1.0 V UVLO VOSCPROT R2 Vdemag out VOSC (from Oscillator) Thermal Protection S RQ R PWM Latch Substrate Current Sense Comparator Current Sense 7 C R RS Q1 3 R3 VC 14 1.0 mA
Current Sense Comparator and PWM Latch The MC44604 can operate as a current mode controller and/or as a voltage mode controller. In current mode operation, the MC44604 uses the current sense comparator, where the output switch conduction is initiated by the oscillator and terminated when the peak inductor current reaches the threshold level established by the Error Amplifier output (Pin 13). Thus the error signal controls the peak inductor current on a cycle-by-cycle basis. The Current Sense Comparator PWM Latch configuration used ensures that only a single pulse appears at the Source Output during the appropriate oscillator cycle. The inductor current is converted to a voltage by inserting the ground referenced sense resistor RS in series with the power switch Q1. In normal mode, this voltage is monitored by the Current Sense Input (Pin 7) and compared to a level derived from the Error Amp output. The peak inductor current under normal operating conditions is controlled by the voltage at Pin 13 where:
V I pk [ * 1* 4 V (pin13) 3R S
The Current Sense Comparator threshold is internally clamped to 1.0 V. Therefore the maximum peak switch current is:
I pk(max) [ 1* 0 V R S
Vin
Figure 28. Error Amplifier Compensation
In a preferred embodiment, the feedback signal (current) is drawn from the pin 12 that is connected to the pin 15 in normal mode (Note 1). Using a resistor connected on pin 12, this current generates a voltage that is the input signal of the error amplifier arrangement. Oscillator
Note 1. The error amplifier is not used in the standby mode regulation.
Figure 29. Output Totem Pole
The oscillator is a very accurate sawtooth generator.
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MC44604
The Sawtooth Generation
In the steady state, the oscillator voltage varies between about 1.6 V and 3.6 V. Indeed, the sawtooth is obtained by charging and discharging an external capacitor CT (Pin 10), using two distinct current sources = Icharge and Idischarge. In fact, CT is permanently connected to the charging current source (0.4 Iref) and so, the discharge current source has to be higher than the charge one to be able to decrease the CT voltage. This condition is performed, its value being (2 Iref). Two comparators are used to generate the sawtooth. They compare the CT voltage to the oscillator valley and peak values. The comparison to the low value enables to detect the end of the discharge phase while the comparison to the high value determines when the charge cycle must be stopped. A latch (LDISCH) memorizes the oscillator state.
Vref 0.4 IREF CVOS PROT 1V COSC LOW 1.6 V COSC HIGH 10 CT 3.6 V Vosc prot Vosc CT< 1.6 V DISCHARGE R Q S Q
order to perfectly compensate the (0.4 Iref) current source that permanently supplies CT. On-time is only allowed during the oscillator capacitor charge. So, the maximum duty cycle is 80%. (Note 1) The demagnetization condition is taken into account by a second latch (Losc). (Refer to demagnetization for further details.)
Oscillator Frequency
The oscillator frequency can be deducted using the following equations:
T + C * DV I charge T charge T + C * DV I discharge discharge T
.
where: Tcharge is the oscillator charge time DV is the oscillator peak to peak value Icharge is the oscillator charge current and Tdischarge is the oscillator discharge time Idischarge is the oscillator discharge current So, as: fosc = 1 /(Tcharge + Tdischarge) if the REGUL arrangement is not activated, the following equation can be obtained:
f osc X 0 * 395 R *C ref T
LOSC R Vdemag out
DISCH S
Demagnetization Block (Note 2)
COSC REGUL 0 1
1
0 IREGUL MC44604 IDISCHARGE
Figure 30. Oscillator
Now, in addition to the charge and discharge cycles, a third state can exist. This phase can be produced when at the end of the discharge phase, the oscillator has to wait for a demagnetization pulse before re-starting. During this delay, the CT voltage must remain equal to the oscillator valley value (X1.6 V). So, a third regulated current source IREGUL controlled by COSC REGUL, is connected to CT in
To enable the output, the Losc latch complementary output must be low. Now, this latch reset is activated by the LDISCH output during the discharge phase. So, to restart, the Losc has to be set (refer to Figure 30). To perform this, the demagnetization signal must be low. In a fly-back, a good means to detect the demagnetization consists in using the VCC winding voltage. Indeed this voltage is: - negative during the on-time, - positive during the off-time, - equal to zero for the dead-time with generally a ringing (refer to Figure 31). That is why, the MC44604 demagnetization detection consists of a comparator that can compare the VCC winding voltage to a reference that is typically equal to 65 mV.
Note 1. The output is disabled by the signal Vosc prot when VCT is lower than 1 V. (Refer to Figure 29 and Figure 30.) Note 2. The demagnetization detection can be inhibited by connecting pin 8 to the ground.
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MC44604
Vref 0.75 V VPin 8 Zero Current Detection Pin 11 DZ 65 mV Soft-Start Capacitor 2.4 V VOSC Oscillator -0.33 V MC44604 On-Time Off-Time Dead-Time 0.4 Iref Output Buffer Output Control
Dmax
Figure 33. Dmax and Soft-Start Block Diagram Figure 31. Demagnetization Detection
Maximum Duty Cycle and Soft-Start Control A diode D has been incorporated to clamp the positive applied voltages while an active clamping system limits the negative voltages to typically -0.33 V. This negative clamp level is sufficient to avoid the substrate diode switching on. In addition to the comparator, a latch system has been incorporated in order to keep the demagnetization block output level low as soon as a voltage lower than 65 mV is detected and as long as a new restart is produced (high level on the output) (refer to Figure 33). This process avoids that any ringing on the signal used on the pin 8, disrupts the demagnetization detection. Finally, this method results in a very accurate demagnetization detection. For a higher safety, the demagnetization block output is also directly connected to the output, disabling it during the demagnetization phase (refer to Figure 29).
Oscillator Buffer R Q Demag S Output
As explained in the paragraph "oscillator", the duty cycle cannot be more than 80%. Now, using the Dmax and soft-start control, this duty cycle can be limited to a lower value. Indeed as depicted in Figure 34, the pin 11 voltage is compared to the oscillator sawtooth, so that the MC44604 output should be disabled as soon as the pin 11 level becomes lower than the oscillator voltage (refer to Figure 27 and to Figure 25).
Voltage Pin 11 VCT (Pin 10) Dmax
Figure 34. Maximum Duty Cycle Control
VCC Negative Active Clamping System Pin 8 D
Vdemag out
65 mV C DEM
Now, using the internal current source (0,4 Iref), the pin 11 voltage can easily be fixed by connecting a resistor to this pin. If a capacitor is connected to pin 11 (without any resistor or in parallel to a resistor for instance), the pin 11 voltage increases from 0 to its maximum value progressively (refer to Figure 26). Thus, the allowed maximum duty cycle grows for a delay depending on the capacitor value (and the resistor value when a resistor is connected). So, this pin can be used to limit the duty cycle during the startup phase and thus, to perform a soft-start.
Figure 32. Demagnetization Block
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Pin 11 RI R Connected to VZ Pin 11 I = 0.4 Iref C VZ RI = RC C // R
Figure 35. Different Possible Uses of Pin 11
In any case (particularly if no external component is connected to pin 11), an internal zener diode (DZ, refer to Figure 34) is able to clamp the pin 11 voltage to a value VZ that is higher than the oscillator value and so, that results in no max duty cycle limitation. As soon as Vdisable1 is detected, a signal UVLO1 is generated until the VCC voltage falls down to Vdisable2 (refer to the undervoltage lockout section paragraph). During the delay between the disable 1 and the disable 2, using a transistor controlled by UVLO1, the pin 11 voltage is made equal to zero in order to make the max duty cycle and soft-start arrangement ready to work for the next restart. In standby mode, this block is inhibited in order not to interfere with the Standby Current Set. Protection The MC44604 can ensure a high converter reliability thanks to the protection it offers.
Demagnetization Detection (Refer to Demag ) Foldback
VCS grows up till it reaches its maximum value (normally, VCS max = 1 V). Then if the output load keeps on increasing, the system is not able to supply enough energy to maintain the output regulation. Consequently, the decreasing output can be used to apply a voltage that diminishes to a value lower than 1 V, to pin 5, in order to limit the maximum peak current. In this way, the well known foldback characteristic is obtained (refer to Figure 36). The foldback action can be inhibited by connecting the pin 5 to VCC.
Overvoltage Protection
The overvoltage arrangement consists of a comparator that compares the pin 6 voltage to Vref (2,5 V) (refer to Figure 37).
Vref VCC In T 0 VOVP Pin 6 2.5 V 11.6 K 2K 2.5 V (Vref) Delay 5.0 ms Out Enable In COVLO Out Delay 2.0 ms (If VOVP out = 1.0, the Output is Disabled) VOVP out
As depicted in Figure 28, the foldback input (pin 5) enables to reduce the maximum VCS value that would be equal to 1 typically, if there was no foldback action. Finally, the foldback arrangement is a programmable peak current limitation.
Vout VO Nominal New Startup Sequence Initiated VCC Vdisable2 Iout Overload Ipk max
Figure 37. Overvoltage Protection
If no external component is connected to pin 6, the comparator non inverting input voltage is nearly equal to:
2 k 11, 6 k ) 2 k
*V CC
So, the comparator output is high when:
2 k 11, 6 k ) 2 k
*
V w 2, 5 V CC
V w 17 V CC
Figure 36. Foldback Characteristic
It could be used as a soft-start (by connecting to pin 5, a gradually increasing voltage) but in fact, it has been designed to provide the system with an effective overload protection. Indeed, as the output load gradually increases, the required converter peak current becomes higher and so,
A delay latch (2 ms) is incorporated in order to only take into account the overvoltages that last at least 2 ms. If this condition is achieved, VOVPout the delay latch output becomes high and as this level is brought back to the input through an OR gate, VOVPout remains high (and so, the IC output is disabled) until Vref is disabled. Consequently when an overvoltage longer than 2 ms is detected, the output is disabled until a new circuit restart. The VCC is connected when once the circuit has started-up in order to limit the circuit startup consumption (T is switched on when once Vref has been generated).
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MC44604
The overvoltage section is enabled 5 ms after the regulator has started to allow the reference Vref to stabilize. By connecting external resistors to pin 6, the threshold VCC level can be changed.
Rref Pin 16
Thus, finally in normal mode, the upper Vcc limit that enables the output to be active, is 9.4 V (maximum value of Vdisable1) and so the minimum hysteresis is 4.2 V. [(Vstup-th)min = 13.6 V]. The large hysteresis and the low startup current of the MC44604 make it ideally suited for off-line converter applications where efficient bootstrap startup techniques are required. Standby Management
VCC (Pin 1)
Vref enable CSTARTUP 10 1 0 STARTUP 14.5 V
Vdisable 7.5 V or 12.5 V
Reference Block: Voltage and Current Sources Generator (Vref, Iref, ...)
The MC44604 has been designed to detect the transitions between the standby and normal mode and to manage each mode in an optimal way. In standby, the device monitors a pulsed mode that enables to drastically reduce the power consumption.
Pulsed Mode
Vdisable1 9.0 V
UVLO1 CUVLO1 (to SOFT-START) MC44604
The MC44604 standby is preferably associated to a flyback configuration as depicted in Figure 39.
Input Voltage VCC Lp 1 = Standby 0 = Normal Mode 10 mP MC44604 Vstby
Figure 38. VCC Management
Undervoltage Lockout Section As depicted in Figure 39, an undervoltage lockout has been incorporated to guarantee that the IC is fully functional before allowing operation of the system. Indeed, the VCC is connected to the non inverting input of a comparator that has an upper threshold equal to 14,5 V (Vstup-th) and a lower one equal to 7.5 V (Vdisable2) in normal mode and 14.5 V and 12.5 V in Standby mode (typical values) (Note 1). This hysteresis comparator enables or disables the reference block that generates the voltage and current sources required by the system. This block particularly, produces Vref (pin 16 voltage) and Iref that is determined by the resistor Rref connected between pin 16 and the ground:
V I + ref where V + 2.5 V (typically) ref ref R ref
Regulator
Figure 39. Standby Flyback Configuration
In effect, by this means, all the output regulation levels are divided by the ratio:
V V HV
stby
In addition to this, VCC is compared to a second threshold level that is nearly equal to 9 V (Vdisable1) so that in normal mode, a signal UVLO1 is generated to reset the maximum duty cycle and soft-start block and so, to disable the output stage (refer to Max. Duty Cycle and Soft-Start ) as soon as VCC becomes lower than Vdisable1. In this way, the circuit is reset and made ready for a next startup, before the reference block is disabled (refer to Figure 26). In standby, UVLO1 is not active (there is no need to discharge the soft-start capacitor as the soft-start pin is maintained short circuited).
Note 1. In standby the difference between V disable2 and Vstup-th is decreased not to have too low pulsed mode frequencies.
where VHV is the normal mode high voltage regulation level, Vstby is the standby mP supply voltage. For instance, in the case of TV or monitors applications, the output levels (except the mP supply voltage, Vstby) are drastically reduced by a ratio in the range of 10. Consequently, as the output voltages are reduced, the losses due to the output leakage consumption, are practically eliminated, without having to disconnect the loads.
Startup Operations
The choice of the right configuration (normal or standby) is performed at each startup.
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MC44604
That is why, as explained in the transitions , at each change of mode, the MC44604 is first turned off so that a new startup should be performed.
Vcc gets higher than Vstup-th Startup
Standby Management
YES
Ipin 15 > Idet*
NO
STANDBY - Pin 15 and pin 12 are kept disconnected and so, the E/A input receives no feedback (the regulation is performed by comparing Ipin 15 to Ireg - refer to standby regulation w) - the soft-start is inhibited and its capacitor is discharged - the lpmax limitation block is activated (clamp of the peak current) - the level Vdisable2 is increased (refer to undervoltage lockout section)
NORMAL MODE - The pin 15 is connected to pin 12 to provide the E/A input with a feedback - the standby block is inhibited
The standby operation consists of two main phases: - the off phase during which the MC44604 is off. During this sequence, the circuit Vcc is being charged and no energy is transferred to the output. - the active phase during which the MC44604 is on. At this moment, some power can be drawn from the mains. During the active phase, the power conversion is controlled so that: - the normal mode regulation means (error amplifier) and the soft-start are inhibited - the Vcc undervoltage lockout (Vdisable2) level is increased from 9 V up to 12.5 V. This limitation of the Vcc hysteresis enables to increase the pulsed mode frequency - the peak inductor current is forced to be constant and equal to the level programmable by the external resistor RIpmax connected to the pin 9 so that:
0, 4 I pmax + R ref lpmax 2, 6 R S I
where: Ipmax is the standby inductor peak current, RS is the current sense resistor.
* this test is performed during the first 5 ms of circuit operation
Figure 40. Startup Operation
At each startup, the circuit detects if it must work in standby or in normal mode configuration. To do that, the circuit compares the current Ipin15 to Idet so that, if: - Ipin15 > Idet: Standby mode - Ipin15 < Idet: Normal mode According to the detected mode, the circuit configuration is set (refer to Figure 40). This detection phase takes place during the first 5 ms of circuit operation in order to have the internal signals well stabilized before the decision is taken.
Vstby Opto Coupler Rinit Rreg TL431 Z mP Rdet C T MC44604 R VCC
- when the pin 15 current gets higher than the threshold Ireg (20.5 Iref), this operating mode stops and the circuit output is latched off. So, in fact, the active phase is split into two distinct sequences and finally three phases can be defined (refer to Figure 32): - the off phase: the MC44604 is off and the Vcc capacitor is being charged. When the Vcc gets higher than Vstup-th, the circuit turns on and the switching sequence starts - the switching phase: the circuit is on and forces a constant peak inductor current. This sequence lasts until Ipin15 gets higher than Ireg - the latched phase: the circuit is on but the output is disabled. This sequence lasts until the standby Vcc undervoltage lockout voltage (12.5 V) is reached. A new off phase is then initialized.
Pin 15
Figure 41. Standby Pin 15 Arrangement
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MC44604
Vstup (14.5 V) Stby Vdisable 2 (12.5 V) V stby m P supply voltage
V CC
detect a sequence during which Ipin15 lower than Ireg before being able to latch gets higher than Vz). Transitions Between Normal Mode and Standby Mode (Refer to Figure 43)
V pin 15
I zener I pin 15 output I reg I det
The MC44604 detects a transition by comparing the pin 15 current to: - Idet (transition standby to normal mode) - Iinit (transition normal mode to standby) Each transition detection results in the circuit turning off, so that the device can work in the new mode after the following restart.
* transition normal mode to standby:
The output is latched off until the next re-start
time
Figure 42. Standby Regulation
As a consequence, Vstby varies between a peak value (obtained at the end of the switching phase) and a valley level (reached at the end of the off phase). The level of the peak value is controlled by forcing a current higher than Ireg in pin 15 when this level has reached the desired value. The arrangement in Figure 41 allows to obtain this operation. A zener diode Z is connected so that a current limited by Rreg, is drawn by this device, when the mP supply voltage gets higher than Vz. By this way, the current injected in the pin 15 increases and when this current is detected as higher than Ireg, the output gets disabled until the next startup (Note 1). Practically, the pin 15 current can be expressed as follows (when the zener is activated):
I pin15 + CTR V * Vopto * V z stby R reg
This transition is detected by comparing the Ipin15 current to the threshold current (Iinit). Iinit is high enough so that the opto coupler current used for the regulation, never exceeds this value. The arrangement in Figure 41 is well adapted to this mode of operation. The mP initializes the standby mode by turning on the switch T. This results in the C capacitor charge that produces a peak current in the primary side of the opto coupler. C and Rinit must be dimensioned so that the opto coupler primary side generates a pin 15 current higher than Iinit during more than 1 ms.
* transition standby to normal mode:
where: CTR is the opto coupler gain, Vopto is opto coupler voltage drop. So, as the Vstby peak value is obtained when (Ipin15 = Ireg), it can be calculated using the following equation:
V + V z ) Vopto ) stby pk R reg Ireg
V CC
Practically, Rreg is chosen very low (in the range of 10 W, low resistance just to limit the current when Vstby pk gets higher than Vz):
V ^ V z ) Vopto stby pk Note 1. If the pin 15 current is higher than Ireg at startup, the output is just shutdown but not latched. The circuit must
IIII IIII
If the circuit detects that (Ipin15 < Idet) during standby operation, the circuit is turned off. So, if the normal mode is maintained at the following startup, the circuit will restart in a normal mode configuration. The arrangement in Figure 41 allows to perform this detection. When the mP detects the end of the standby, it turns off the switch T and the opto coupler stops supplying current to the circuit.
V CC 14.5 V 12.5 V Normal Mode
(.... )
Standby Burst Mode
Normal Mode Normal Mode time
Standby
The transition stand-by to normal mode occurs while the circuit is off (VCC charge phase) 14.5 V 12.5 V Normal Mode Standby
(.... )
CTR
Standby Burst Mode Normal Mode
Normal Mode time
The transition stand-by to normal mode occurs while the circuit is on (working phase)
Figure 43. Transitions Between Modes
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MC44604
Application Schematic
185 Vac to 270 Vac
RFI Filter
CS 1nF11kV 1 W 15 W
C4....C7 1 nF/1000 V
RS 4.7 MW 220 pF 120/0.5 A
D1 ... D4 1N4007
C1 100 mF
22 kW (5W) 1 mH
MR856 100 pF 47 k 120 pF 100 nF 1N4937 1 kW 0.1 mF
R2 68 KW (2W) R19 10 kW C9 1 nF 11 MC44604P C10 1mF R15 22 kW 1 kW C11 1mF R16 22 kW 12 13 14 15 6 5
1N4148 C2 100 mF VCC
9 10
8 7
R4 C16 100 pF 27 kW 1 kW 1 nF R9 180 kW R8 15 kW 1N4148
47 nF Laux MR856 1.2 k C14 4.7 nF
Lp
220 pF
MCR22-6 1N4148 28V/1A
MR856 100 mF 220 pF MR852 1000 mF 220 pF
0.1 mF
R6 150 W C18 2.2 nF MR856 R14 0.47 W (1W) R13 1 kW (5W)
15V/1A
4 R26 20 W 3 R11 100 W 2 1 C13 100 nF MTP6N60E
0.1 mF
8V/1A MR852 4700 mF BC237B 0.1 mF
16 R19 10 kW
VCC MOC8104 117.5 kW 100 nF 220 kW 47 W 12 V BC237B 4.7 kW BC237B mP 2.5 kW 8.2 k 22 W 270 W TL431 4.7 kW 4.7 kW
4.7 k
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MC44604
PACKAGE DIMENSIONS
PDIP-16 P SUFFIX CASE 648-08 ISSUE T
-A-
16 9
B
1 8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL.
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M
M
0.25 (0.010)
M
DIM A B C D F G H J K L M S
INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040
MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
GreenLine is a trademark of Motorola, Inc.
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MC44604/D

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